1. Field of the Invention
The present invention relates to a PCB with a film capacitor embedded therein and a method for manufacturing the same, and more particularly, to a PCB with a thin film capacitor embedded therein, in which a buffer layer is formed between a dielectric layer and an upper electrode to increase the thickness of the upper electrode and the surface roughness of the upper electrode, and a method for manufacturing the same.
2. Description of the Related Art
To date, high-integrity passive devices are demanded more for the purpose of producing high performance electronic units. However, various passive devices mounted on a Printed Circuit Board (PCB) are regarded as a great obstacle in the miniaturization of the electronic units. In particular, as more semiconductor active devices are internally mounted or embedded with their input/output terminals increasing in number, spaces are necessary to provide more passive devices around the embedded active devices. However, such demands are not a problem that can be solved simply.
A capacitor is a representative passive device. Such capacitors are required to be suitably installed to reduce inductance as operating frequency is getting higher. For example, a decoupling capacitor used to stably supply electric power is required to be arranged most adjacent to an input terminal in order to reduce inductance according to high frequency.
To meet such miniaturization and high frequency demands, various types of low equivalent series inductance (ESL) multilayer capacitors have been developed. However, since conventional Multi-Layer Cofired Ceramic (MLCC) capacitors are discrete devices, it is essentially difficult to overcome such problems. Since such capacitors are generally used as devices of an electric circuit, it is possible to effectively reduce the size of an electric circuit board only if the capacitors can be embedded in the electric circuit board. On this point of view, recently active studies are being made to realize embedded capacitors.
The embedded capacitors can be used in a memory card, a PC motherboard and various RF modules to remarkably reduce product size. In addition, it is possible to arrange the embedded capacitors in the vicinity of input terminals of active devices, thereby minimizing conductor length and reducing inductance remarkably. In the embedded capacitors, however, poor heterogeneous bonding makes it difficult to obtain thick electrodes. That is, at a dielectric layer with a thickness of 1.0 μm or less and upper and lower electrodes each with a thickness of 1.0 μm, bonding may be enabled up to a certain degree. However, with the upper and lower electrodes thicker than the former value, residual strain of a metal layer causes the metal layer to peel off from a dielectric layer. This is a problem taking place because ceramics and metals have different crystal structures.
A conventional approach to solve the foregoing problems of the embedded capacitor was disclosed by U.S. Pat. No. 6,818,469. According to this conventional technology, referring to FIG. 1, a PCB 10 with a film capacitor embedded therein includes an insulating substrate 11a, a lower electrode 13 formed on the insulating substrate 11a, a dielectric film 15 formed on the lower electrode 13 and an upper electrode formed on the dielectric film 15. However, since the conventional technology employs Physical Vapor Deposition (PVD) such as sputtering and E-beam to form the upper and lower electrodes, it costs high to make the electrodes thick. Furthermore, electrodes produced by PVD typically have a surface roughness at most 100 nm, and thus the insulating substrate 11b peels off from the upper electrode in the following process if the substrate 11b is compressively stacked on the upper electrode 17.